diff options
| author | Franck LENORMAND <franck.lenormand@nxp.com> | 2019-02-15 16:24:35 +0100 |
|---|---|---|
| committer | Franck LENORMAND <franck.lenormand@nxp.com> | 2019-03-12 17:25:26 +0100 |
| commit | d4303aae81b5a27b54418461bde257e3eeb655e1 (patch) | |
| tree | dd9b5c1cad0ef4a9ecdfc635a6140510f48b9516 /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | |
| parent | 51d78bf7787c0e4e5f7337b51a21af95a19586a5 (diff) | |
SSI-35: crypto: caam - Do not rely on common index of jr
With current code, the index are stored in an array at their common index,
ie jr0 store at index 0, jr1 at 1, ...
It force to use buggy mechanic to compute it and is not scalable.
This patch removes the mechanic of computation of hardware register
addresses and the notion of first_jr_index.
Instead the first JR available is set to index 0 of the table and so on.
Legacy code was retrieving the index of the first jr to access registers.
With this new way, we simply always access the first jr.
This is working because after the configuration of the JR in ctl
(enable_jobrings), the driver checks that there is at least 1 JR.
Without this, we could create segfaults.
Fixes: e9688f0f05e0 ("MLK-15473-1: crypto: caam: Add CAAM driver support for iMX8 soc family")
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index 8fc95161d511..715a08835d8c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -4360,7 +4360,6 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0x31400000 0x400000>; - fsl,first-jr-index = <2>; fsl,sec-era = <9>; sec_jr1: jr1@0x20000 { |