diff options
| author | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2020-07-06 20:17:30 +0300 |
|---|---|---|
| committer | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2020-07-06 20:24:05 +0300 |
| commit | d6e1cff14875d6ce338c1f27afe0639ef0f97b79 (patch) | |
| tree | 2449859b19a9e58abb0414700621a86f234d91d6 /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | |
| parent | 453fdfde79e13e27030a56c7ea787e98698b0dba (diff) | |
| parent | 0347fe7527d062e1762498cb5863bcd5bde0997b (diff) | |
Merge branch 'imx_4.14.98_2.3.0' into toradex_4.14-2.3.x-imx
Fix conflicts after merging changes from the latest NXP branch.
Conflicts:
arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
drivers/pci/dwc/pci-imx6.c
Related-to: ELB-1306
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index c85fd8aed9ad..71133435d2f6 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -4160,8 +4160,12 @@ clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, - <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, + <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>, + <&clk IMX8QM_HSIO_PHY_X2_PER_CLK>, + <&clk IMX8QM_HSIO_MISC_PER_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", + "pcie_inbound_axi", "phy_per", "misc_per"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, @@ -4203,8 +4207,13 @@ clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>, - <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; + <&clk IMX8QM_HSIO_PCIE_X1_PER_CLK>, + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, + <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>, + <&clk IMX8QM_HSIO_PHY_X2_PER_CLK>, + <&clk IMX8QM_HSIO_MISC_PER_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pciex2_per", + "pcie_inbound_axi", "phy_per", "misc_per"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, @@ -4230,10 +4239,18 @@ <&clk IMX8QM_HSIO_PHY_X1_PCLK>, <&clk IMX8QM_HSIO_SATA_EPCS_TX_CLK>, <&clk IMX8QM_HSIO_SATA_EPCS_RX_CLK>, + <&clk IMX8QM_HSIO_PCIE_X1_PER_CLK>, + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, + <&clk IMX8QM_HSIO_SATA_PER_CLK>, + <&clk IMX8QM_HSIO_PHY_X1_PER_CLK>, + <&clk IMX8QM_HSIO_PHY_X2_PER_CLK>, + <&clk IMX8QM_HSIO_MISC_PER_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>, <&clk IMX8QM_HSIO_PHY_X1_APB_CLK>; clock-names = "sata", "sata_ref", "epcs_tx", "epcs_rx", + "per_clk0", "per_clk1", "per_clk2", + "per_clk3", "per_clk4", "per_clk5", "phy_pclk0", "phy_pclk1", "phy_apbclk"; hsio = <&hsio>; power-domains = <&pd_sata0>; |