diff options
| author | Robert Chiras <robert.chiras@nxp.com> | 2018-11-26 14:47:14 +0200 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:36:05 +0800 |
| commit | dc35475ddf09cdbd1f1227b657150c59fff954fe (patch) | |
| tree | c4ca11cd2b15d607d2a69c9fd8f8e81f3c8ba991 /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | |
| parent | 71a1cbb29a67b359b8bb0bb7b8dd8f6b0c895a99 (diff) | |
MLK-17537-13: arch: arm64: fsl-imx8qm: Add phy_ref clock for DSI
Currently, the phy_ref clock is also used by dsi_bridge nodes (nwl-dsi
driver) in order to set the phy_ref rate needed by a specific mode.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index 38a8edec61b2..3d1ca5f7af57 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -1963,7 +1963,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&irqsteer_dsi0>; clocks = - <&clk IMX8QM_CLK_DUMMY>, + <&clk IMX8QM_MIPI0_BYPASS_CLK>, <&clk IMX8QM_MIPI0_DSI_TX_ESC_CLK>, <&clk IMX8QM_MIPI0_DSI_RX_ESC_CLK>; clock-names = "phy_ref", "tx_esc", "rx_esc"; @@ -2386,7 +2386,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&irqsteer_dsi1>; clocks = - <&clk IMX8QM_CLK_DUMMY>, + <&clk IMX8QM_MIPI1_BYPASS_CLK>, <&clk IMX8QM_MIPI1_DSI_TX_ESC_CLK>, <&clk IMX8QM_MIPI1_DSI_RX_ESC_CLK>; clock-names = "phy_ref", "tx_esc", "rx_esc"; |