diff options
| author | Robert Chiras <robert.chiras@nxp.com> | 2019-03-01 10:39:19 +0200 |
|---|---|---|
| committer | Robert Chiras <robert.chiras@nxp.com> | 2019-03-05 10:27:06 +0200 |
| commit | e3f863c3b9b2eddea710f15c6c7de70b2622c001 (patch) | |
| tree | 2adbbd42caabc9a62f80fe30707b2496adceb2a2 /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | |
| parent | 02b97c00825a202119899e3e9752401bb82ab814 (diff) | |
MLK-20718-4: arm64: dts: imx8qm: Use DSI PHY_REF clk
Until now, the DSI PHY_REF clock was by default ON in SCFW, which made
this clock unusable in kernel, therefore, this clock was set as
CLK_DUMMY in DSI device nodes.
Sinnce this clock was set to OFF in SCFW, now it can be used from
kernel, so add it to device nodes so that the driver can use it
properly.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index 7c3a092963dc..4c0f20d740a8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -1933,7 +1933,7 @@ clocks = <&clk IMX8QM_MIPI0_PXL_CLK>, <&clk IMX8QM_MIPI0_BYPASS_CLK>, - <&clk IMX8QM_CLK_DUMMY>; + <&clk IMX8QM_MIPI0_DSI_PHY_CLK>; clock-names = "pixel", "bypass", "phy_ref"; power-domains = <&pd_mipi0>; csr = <&mipi_dsi_csr1>; @@ -2356,7 +2356,7 @@ clocks = <&clk IMX8QM_MIPI1_PXL_CLK>, <&clk IMX8QM_MIPI1_BYPASS_CLK>, - <&clk IMX8QM_CLK_DUMMY>; + <&clk IMX8QM_MIPI1_DSI_PHY_CLK>; clock-names = "pixel", "bypass", "phy_ref"; power-domains = <&pd_mipi1>; csr = <&mipi_dsi_csr2>; |