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authorPeter Chen <peter.chen@nxp.com>2018-09-28 14:44:35 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:34:38 +0800
commite972fbef865ebd00e9b8c4dabd1b147b1c45b7eb (patch)
tree09cc018c7c8734ef6636507dcd846b91ce360b9d /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
parent810541291f1ad6482e1144348392a0feb36102bc (diff)
MLK-19850-3 ARM64: dts: fsl-imx8qm-device: enlarge USB PHY register region
There is a DCD module at USBPHY, the offset is from 0x800. Reviewed-by: Jun Li <jun.li@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
index 8cf06bcdf91a..0972f7bbc9f5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
@@ -3610,7 +3610,7 @@
usbphy1: usbphy@0x5b100000 {
compatible = "fsl,imx8qm-usbphy", "fsl,imx7ulp-usbphy", "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
- reg = <0x0 0x5b100000 0x0 0x200>;
+ reg = <0x0 0x5b100000 0x0 0x1000>;
clocks = <&clk IMX8QM_USB2_PHY_IPG_CLK>;
power-domains = <&pd_conn_usbotg0_phy>;
};