diff options
author | Peng Fan <peng.fan@nxp.com> | 2018-09-14 21:20:27 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:14 +0800 |
commit | 8f5c5db21b587f8286d006b1b8f7a6a7a9b4d556 (patch) | |
tree | beb7b3f28357a3b94bda26dbf349ad64872c5a50 /arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts | |
parent | 47e828d2913fb07ca17269fe2ce6a523a4b27f57 (diff) |
MLK-19664-3 ARM64: dts: imx8qm domu: passthrough pcie to DomU
Passthrough pcie to DomU to support pcie wifi.
Add the needed GPIOs in dom0 dts.
Add SMMU hook for pciea.
Modify the reserved-memory for pcie usage.
passthrough pcie related LPCG to make sure domu not panic when access
LPCG.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts | 43 |
1 files changed, 42 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts index 06c9acb18afb..d9ac30c52e81 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts @@ -105,6 +105,11 @@ SC_R_DMA_0_CH14 SC_R_DMA_0_CH15 SC_R_MU_2A + /* pcie */ + SC_R_PCIE_B + SC_R_PCIE_A + SC_R_SERDES_0 + SC_R_HSIO_GPIO >; pads = < /* i2c1_lvds1 */ @@ -131,7 +136,14 @@ SC_P_UART1_CTS_B SC_P_UART1_RTS_B SC_P_QSPI1A_DQS + /* pciea */ + SC_P_PCIE_CTRL0_CLKREQ_B + SC_P_PCIE_CTRL0_WAKE_B + SC_P_PCIE_CTRL0_PERST_B + SC_P_LVDS1_I2C0_SDA + SC_P_USDHC2_RESET_B >; + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>, <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 29 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>; }; }; @@ -181,6 +193,11 @@ reg = <0x0 0x5d2a0000 0x0 0x10000>; xen,passthrough; }; + + rpmsg_reserved_mem: rpmsg_reserved_mem@90000000 { + reg = <0x0 0x90000000 0x0 0x400000>; + xen,passthrough; + }; }; &mu_rpmsg1 { @@ -188,6 +205,8 @@ }; &rpmsg1 { + /* Let xen not create mapping form dom0 */ + /delete-property/ reg; status = "disabled"; }; @@ -251,7 +270,7 @@ &smmu { mmu-masters = <&dpu2 0x13>, <&gpu_3d1 0x15>, <&usdhc1 0x12>, <&usbotg1 0x11>, - <&edma01 0x10>, <&cm41 0x09>; + <&edma01 0x10>, <&cm41 0x09>, <&pciea 0x08>; }; &lvds_region2 { @@ -399,7 +418,29 @@ xen,passthrough; }; +&hsio { + xen,passthrough; +}; + +&hsio_pcie_x2_lpcg { + xen,passthrough; +}; + +&hsio_phy_x2_lpcg { + xen,passthrough; +}; + +&hsio_pcie_x2_crr2_lpcg { + xen,passthrough; +}; + +&hsio_pcie_x1_lpcg { + xen,passthrough; +}; + &pciea { + #stream-id-cells = <1>; + iommus = <&smmu>; xen,passthrough; }; |