diff options
| author | ming_qian <ming.qian@nxp.com> | 2019-01-29 16:34:21 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:36:02 +0800 |
| commit | a1229ecbf93aba6aec3dde27f8d5fc305c7d2f4a (patch) | |
| tree | 2d5b5a4edbffeda636b30a31007f92642023e64f /arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts | |
| parent | f8524c61bf9e3b273eccc7c311f171725081f5fa (diff) | |
MLK-20797-2: VPU Encoder: reserve memory for actframe
the region of CMA associated with M0+ core is in [256M, 1G]
It can't be guaranteed that it's uncachable for M0+ core.
There are some risk, reserve memory to make sure it's in [128M, 256M].
Eliminate the potential risks
Signed-off-by: ming_qian <ming.qian@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts index 3bb9fe6b9a0c..6225544ee6df 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts @@ -339,6 +339,10 @@ xen,passthrough; reg = <0 0x92400000 0 0x2000000>; }; + encoder_reserved_mem: encoder_reserved_mem@0x94400000 { + xen,passthrough; + reg = <0 0x94400000 0 0x800000>; + }; /* This piece memory is used by M41, M40 is not covered */ m41_mem: m41_mem@0x94400000 { |