diff options
author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2018-10-31 16:46:24 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:53 +0800 |
commit | 2f67400fc88b561bc18fab2685a810ac66bc01ca (patch) | |
tree | 83c5d06abef1732a58a0b12ef0f9f1f7dfca2651 /arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | |
parent | 00dc69605603a33e637e726e183a413cceb07980 (diff) |
MLK-19750-4: ARM64: dts: workaround 192kHz recording noise issue
There is noise issue with 192kHz recoding with ESAI + CS42xx8 on imx8qm
mek board.
This issue is caused by the round trip delay due to longer trace length
on board. After we switch to tx master, rx slave mode, the issue is gone.
so the setting can workaround the issue, the reason is that the bitclock,
frame clock and data is generated from one side, for recording, is from
codec, the asynchronous of clock and data is eliminated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi index 8181f2fe7f35..60aa2f31848b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi @@ -646,6 +646,7 @@ <&clk IMX8QM_AUD_ESAI_0_EXTAL_IPG>; assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>; assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>; + fsl,txm-rxs; status = "okay"; }; @@ -885,6 +886,7 @@ <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>, <&clk IMX8QM_AUD_MCLKOUT0>; assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; + fsl,txs-rxm; status = "okay"; }; }; |