diff options
| author | Andy Duan <fugang.duan@nxp.com> | 2018-11-07 13:20:06 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:35:03 +0800 |
| commit | 42961f25f50b9800a18e0f4063b283ee93fcf667 (patch) | |
| tree | f31a9cfc4bd656f9b34dcbd0e6ceadb436ca7648 /arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | |
| parent | d5ecba829c1347f1a4cd4a0dc7b34d03290a6b68 (diff) | |
MLK-20258 arm64: dts: imx8qm/qxp mek: configure pin as RTC 32KHz clock output
Configure imx8qm/qxp pin as RTC 32KHz clock output as the
low power clock source for some WIFI chip.
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi index 60aa2f31848b..fe8db1acaae2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi @@ -620,6 +620,12 @@ SC_P_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 0x00000021 >; }; + + pinctrl_wifi: wifigrp{ + fsl,pins = < + SC_P_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20 + >; + }; }; }; @@ -1082,7 +1088,7 @@ &pciea{ ext_osc = <1>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pciea>; + pinctrl-0 = <&pinctrl_pciea &pinctrl_wifi>; disable-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; clkreq-gpio = <&gpio4 27 GPIO_ACTIVE_LOW>; |