diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2018-11-29 13:56:02 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:35:34 +0800 |
| commit | dc0be803013f0bdd37442480da34b8d104cf1245 (patch) | |
| tree | fb4850e49e6c18ec12b572475a9db36bed96705d /arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | |
| parent | ae7bad83a432dc093f8b97bae1ffea019e3fbc27 (diff) | |
MLK-20507 arm64: dts: use clkreq as gpio
- Since the l1ss is not enabled yet, configure
the clkreq# as gpio on 8qm/qxp mek boards.
Re-configure the clkreq# as input and open
drain when l1ss is enabled later.
- Correct the perst# configurations of 8qm.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi index 1202dc57ef09..479a5a0a5a5f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi @@ -438,10 +438,10 @@ pinctrl_pciea: pcieagrp{ fsl,pins = < - SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x04000021 + SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x06000021 SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x04000021 - SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x04000021 - SC_P_USDHC2_RESET_B_LSIO_GPIO4_IO09 0x04000021 + SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x06000021 + SC_P_USDHC2_RESET_B_LSIO_GPIO4_IO09 0x06000021 >; }; |