diff options
| author | Nitin Garg <nitin.garg@nxp.com> | 2018-02-13 21:25:40 -0600 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:30:40 +0800 |
| commit | 655486e6dd80f48f1e6c75eeb7ef683811fbf04d (patch) | |
| tree | ef71fe32ba4f291de48e5908b793dd3288f18dbb /arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | |
| parent | a69c3794f52d826762642cbdcf978a85784f386a (diff) | |
MLK-17597: Add GICC, GICH, GICV addresses to iMX8QM device tree.
Adding GICC, GICH, GICV addresses for iMX8QM
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index 9dc80910836b..903bf40fe171 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -92,7 +92,10 @@ gic: interrupt-controller@51a00000 { compatible = "arm,gic-v3"; reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */ - <0x0 0x51b00000 0 0xC0000>; /* GICR (RD_base + SGI_base) */ + <0x0 0x51b00000 0 0xC0000>, /* GICR */ + <0x0 0x52000000 0 0x2000>, /* GICC */ + <0x0 0x52010000 0 0x1000>, /* GICH */ + <0x0 0x52020000 0 0x20000>; /* GICV */ #interrupt-cells = <3>; interrupt-controller; interrupts = <GIC_PPI 9 |