diff options
| author | ming_qian <ming.qian@nxp.com> | 2019-01-29 16:34:21 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:36:02 +0800 |
| commit | a1229ecbf93aba6aec3dde27f8d5fc305c7d2f4a (patch) | |
| tree | 2d5b5a4edbffeda636b30a31007f92642023e64f /arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | |
| parent | f8524c61bf9e3b273eccc7c311f171725081f5fa (diff) | |
MLK-20797-2: VPU Encoder: reserve memory for actframe
the region of CMA associated with M0+ core is in [256M, 1G]
It can't be guaranteed that it's uncachable for M0+ core.
There are some risk, reserve memory to make sure it's in [128M, 256M].
Eliminate the potential risks
Signed-off-by: ming_qian <ming.qian@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index 59a43fc513ee..9e6d07fef941 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -113,6 +113,10 @@ no-map; reg = <0 0x92400000 0 0x2000000>; }; + encoder_reserved: encoder_reserved@0x94400000 { + no-map; + reg = <0 0x94400000 0 0x800000>; + }; /* global autoconfigured region for contiguous allocations */ linux,cma { @@ -198,6 +202,7 @@ boot-region = <&encoder_boot>; rpc-region = <&encoder_rpc>; + reserved-region = <&encoder_reserved>; reg = <0x0 0x2d000000 0x0 0x1000000>, /*VPU Encoder*/ <0x0 0x2c000000 0x0 0x2000000>; /*VPU*/ reg-names = "vpu_regs"; |