diff options
author | Gao Pan <pandy.gao@nxp.com> | 2018-01-22 10:09:59 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:30:15 +0800 |
commit | a6a756d1a0997f4b7ce74aef733c65be48197354 (patch) | |
tree | fb0fdd93cb30d1038d62fcd431b08cc769a0b0f1 /arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | |
parent | cca51d52d365568f8ce7fee403f1b6cab8bfbd91 (diff) |
MLK-17438 arm64: dts: add emvsim0 device node in register address order
Add emvsim0 device node in register address order
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index 6716e84f5f55..54a253615b0c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -1416,17 +1416,6 @@ }; }; - emvsim0: sim0@5a0d0000 { - compatible = "fsl,imx8-emvsim"; - reg = <0x0 0x5a0d0000 0x0 0x10000>; - interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk IMX8QM_EMVSIM0_CLK>, - <&clk IMX8QM_EMVSIM0_IPG_CLK>; - clock-names = "sim", "ipg"; - power-domains = <&pd_ldo1_sim>; - status = "disabled"; - }; - hdmi:hdmi@56268000 { #address-cells = <1>; #size-cells = <0>; @@ -2570,6 +2559,17 @@ status = "disabled"; }; + emvsim0: sim0@5a0d0000 { + compatible = "fsl,imx8-emvsim"; + reg = <0x0 0x5a0d0000 0x0 0x10000>; + interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8QM_EMVSIM0_CLK>, + <&clk IMX8QM_EMVSIM0_IPG_CLK>; + clock-names = "sim", "ipg"; + power-domains = <&pd_ldo1_sim>; + status = "disabled"; + }; + edma0: dma-controller@5a1f0000 { compatible = "fsl,imx8qm-edma"; reg = <0x0 0x5a2c0000 0x0 0x10000>, /* channel12 UART0 rx */ |