diff options
author | Sandor Yu <Sandor.yu@nxp.com> | 2018-01-04 17:20:27 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:30:07 +0800 |
commit | bdff85b6222001b1cae060f8a070e6cc1beb7052 (patch) | |
tree | d99c9748c0066ebd62c9aa1ec74b29c05bc3ef0f /arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | |
parent | fae3da1da4ab284be233b1339094e33f5d80de04 (diff) |
MLK-17341-2: dts: Add mipi csi gpio propriety
Add mipi csi0/csi1 GPIO propriety.
Add pinctrl setting for mipi_csi0/1 GPIO.
Add power up pin for max9286.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index 15356fdd63a2..e337601129d1 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -2749,6 +2749,36 @@ #interrupt-cells = <2>; }; + gpio0_mipi_csi0: gpio@58222000 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; + reg = <0x0 0x58222000 0x0 0x1000>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&irqsteer_csi0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + power-domains = <&pd_csi0>; + clocks = <&clk IMX8QM_CSI0_IPG_CLK_S>; + clock-names = "ipg"; + status = "disabled"; + }; + + gpio0_mipi_csi1: gpio@58242000 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; + reg = <0x0 0x58242000 0x0 0x1000>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&irqsteer_csi1>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + power-domains = <&pd_csi1>; + clocks = <&clk IMX8QM_CSI1_IPG_CLK_S>; + clock-names = "ipg"; + status = "disabled"; + }; + gpt0: gpt0@5d140000 { compatible = "fsl,imx8qm-gpt"; reg = <0x0 0x5d140000 0x0 0x4000>; |