diff options
author | Frank Li <Frank.Li@nxp.com> | 2018-03-05 05:27:05 -0600 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:30:48 +0800 |
commit | e54dafcbc8d2297461c856d31e308c7bf162350f (patch) | |
tree | 64e58d1d7c60fc768ccad7e771daefd50bc1674e /arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | |
parent | 71922e730ba2ff8e93defaec10c4c7e3562fdebb (diff) |
MLK-17685-1 Enable CCI perfomance monitor
perf list
CCI_400_r1/cycles/ [Kernel PMU event]
CCI_400_r1/mi_retry_speculative_fetch,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_barrier_hazard,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_hi_prio_rtq_full,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_low_prio_rtq_full,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_master_id_hazard,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_mid_prio_rtq_full,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_qvn_vn0,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_qvn_vn1,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_qvn_vn2,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_qvn_vn3,source=?/ [Kernel PMU event]
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index 5a60c6821a23..82ae55d1d33d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -148,6 +148,27 @@ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>; }; + cci@52090000 { + compatible = "arm,cci-400"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0x52090000 0 0x1000>; + ranges = <0 0 0x52090000 0x10000>; + + pmu@9000 { + compatible = "arm,cci-400-pmu,r1", + "arm,cci-400-pmu"; + reg = <0x9000 0x4000>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + }; + }; + imx8qm-pm { #address-cells = <1>; #size-cells = <0>; |