diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2018-01-31 10:57:35 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:30:28 +0800 |
| commit | 7a7bea583a1f2e28b22d1f7a7ebb090f48078128 (patch) | |
| tree | bbdf1919a819c6ab9db9d870d53f496f10a349cc /arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-wm8962.dts | |
| parent | 2fb731cb7829763849f998c23e3210bbccd665f3 (diff) | |
MLK-17455: ARM64: dts: correct the pinctrl setting for audio peripheral
According to the Reference manual, the bit 1-4 of PAD setting is reserved.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-wm8962.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-wm8962.dts | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-wm8962.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-wm8962.dts index 9a65568c7df1..8f39af831aef 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-wm8962.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-wm8962.dts @@ -62,14 +62,14 @@ imx8qxp-lpddr4-arm2 { pinctrl_sai0: sai0grp { fsl,pins = < - SC_P_SAI0_TXFS_ADMA_SAI0_TXFS 0xc600004c - SC_P_SAI0_TXC_ADMA_SAI0_TXC 0xc600004c - SC_P_SAI0_TXD_ADMA_SAI0_TXD 0xc600006c - SC_P_SAI0_RXD_ADMA_SAI0_RXD 0xc600004c - SC_P_SPI2_SDO_LSIO_GPIO1_IO01 0xc600004c - SC_P_SPI2_SDI_LSIO_GPIO1_IO02 0xc600004c - SC_P_SPI2_SCK_LSIO_GPIO1_IO03 0xc600004c - SC_P_MCLK_OUT0_ADMA_ACM_MCLK_OUT0 0xc600004c + SC_P_SAI0_TXFS_ADMA_SAI0_TXFS 0xc6000040 + SC_P_SAI0_TXC_ADMA_SAI0_TXC 0xc6000040 + SC_P_SAI0_TXD_ADMA_SAI0_TXD 0xc6000060 + SC_P_SAI0_RXD_ADMA_SAI0_RXD 0xc6000040 + SC_P_SPI2_SDO_LSIO_GPIO1_IO01 0xc6000040 + SC_P_SPI2_SDI_LSIO_GPIO1_IO02 0xc6000040 + SC_P_SPI2_SCK_LSIO_GPIO1_IO03 0xc6000040 + SC_P_MCLK_OUT0_ADMA_ACM_MCLK_OUT0 0xc6000040 >; }; }; |