diff options
| author | Guoniu.Zhou <guoniu.zhou@nxp.com> | 2018-03-13 18:03:02 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:31:02 +0800 |
| commit | 448a00910724c812181e2ad5b22e7371537b444b (patch) | |
| tree | 6f127a984d03f9f8b301e95285a4cde12e365b86 /arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | |
| parent | af93022251fb7877b816396be80b1755a28a388c (diff) | |
MLK-17790-1: dts: add clocks for CI_PI subsystme
Because QXP will drop parent clock info of CI_PI SS
after system suspend/resume, so driver need to record
the relationship of clocks.
Reviewed-by: sandor.yu <sandor.yu@nxp.com>
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
(cherry picked from commit d4b94c2b128850bed8ec4c00ce0c0e3f86a05fcd)
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi index 5fba80a1eaf3..e11235a67bc0 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi @@ -1725,8 +1725,11 @@ compatible = "fsl,mxc-parallel-csi"; reg = <0x0 0x58261000 0x0 0x1000>; clocks = <&clk IMX8QXP_PARALLEL_CSI_PIXEL_CLK>, - <&clk IMX8QXP_PARALLEL_CSI_IPG_CLK>; - clock-names = "pixel", "ipg"; + <&clk IMX8QXP_PARALLEL_CSI_IPG_CLK>, + <&clk IMX8QXP_PARALLEL_CSI_CLK_SEL>, + <&clk IMX8QXP_PARALLEL_CSI_PER_CLK_DIV>, + <&clk IMX8QXP_PARALLEL_CSI_CLK_DPLL>; + clock-names = "pixel", "ipg", "sel", "div", "dpll"; assigned-clocks = <&clk IMX8QXP_PARALLEL_CSI_CLK_SEL>, <&clk IMX8QXP_PARALLEL_CSI_PER_CLK_DIV>; assigned-clock-parents = <&clk IMX8QXP_PARALLEL_CSI_CLK_DPLL>; |