diff options
author | Alex Marginean <alexandru.marginean@nxp.com> | 2019-08-22 12:47:12 +0300 |
---|---|---|
committer | Li Yang <leoyang.li@nxp.com> | 2019-11-27 14:29:48 -0600 |
commit | 841edb98671cfc4d6f010393ac429c78082ec4bd (patch) | |
tree | 8a88c0425d774b1668822e2310259d33f10e2cab /arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | |
parent | 7545a26aa57016c8d75a5783174704a56b017e55 (diff) |
arm64: dts: LS1028a-rdb: use Ethernet PHY interrupt
Use the PHY interrupt wired to GPIO pins as part of MDIO WA performance
impact mitigation.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts index b0541f40432f..f37a4ff7c03a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts @@ -202,6 +202,8 @@ #size-cells = <0>; sgmii_phy0: ethernet-phy@2 { reg = <0x2>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; }; }; @@ -213,18 +215,26 @@ &enetc_mdio_pf3 { qsgmii_phy1: ethernet-phy@4 { reg = <0x10>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; qsgmii_phy2: ethernet-phy@5 { reg = <0x11>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; qsgmii_phy3: ethernet-phy@6 { reg = <0x12>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; qsgmii_phy4: ethernet-phy@7 { reg = <0x13>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; }; }; |