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authorYinbo Zhu <yinbo.zhu@nxp.com>2019-08-14 12:02:11 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:11:26 +0800
commitc29a6ec669762d5041c6ba4faa9141fdda413f45 (patch)
treefaf1bc136f8d727bd657b369d2a352e2c29d5a66 /arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
parent394d9b122325b31f7d999a936bfa6d8d01159b33 (diff)
arm64: dts: ls1028a: fix little-big endian issue for dcfg
dcfg use little endian that SoC register value will be correct Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 18e9b413c3de..c75573699edd 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -162,7 +162,7 @@
dcfg: syscon@1e00000 {
compatible = "fsl,ls1028a-dcfg", "syscon";
reg = <0x0 0x1e00000 0x0 0x10000>;
- big-endian;
+ little-endian;
};
scfg: syscon@1fc0000 {