diff options
| author | Laurentiu Tudor <laurentiu.tudor@nxp.com> | 2018-09-20 13:46:54 +0300 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:41 +0800 |
| commit | a97ab6690779ad5b546fe6aa074955013caec5eb (patch) | |
| tree | f34a2ce1ca1ca4ff555a20fe87741f59a723d8f2 /arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | |
| parent | ba183cc45d3713cdccb838998ed852797db52f6c (diff) | |
arm64: dts: ls104x: use a pseudo-bus to constrain usb dma size
Wrap the usb controllers in an intermediate simple-bus and use it to
constrain the dma address size of these usb controllers to the 40 bits
that they generate toward the interconnect.
This is required because the SoC uses 48 bits address sizes and this
mismatch would lead to smmu context faults because the usb generates
40-bit addresses while the smmu page tables are populated with 48-bit
wide addresses.
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 82 |
1 files changed, 45 insertions, 37 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 614a1f313113..097ba4e5e70b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -726,43 +726,51 @@ <&clockgen 4 0>; }; - usb0: usb3@2f00000 { - compatible = "snps,dwc3"; - reg = <0x0 0x2f00000 0x0 0x10000>; - interrupts = <0 60 0x4>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - usb3-lpm-capable; - snps,dis-u1u2-when-u3-quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - configure-gfladj; - }; - - usb1: usb3@3000000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3000000 0x0 0x10000>; - interrupts = <0 61 0x4>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - usb3-lpm-capable; - snps,dis-u1u2-when-u3-quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - configure-gfladj; - }; - - usb2: usb3@3100000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = <0 63 0x4>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - usb3-lpm-capable; - snps,dis-u1u2-when-u3-quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - configure-gfladj; + usb_aux_bus: usb_aux_bus { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>; + + usb0: usb3@2f00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x2f00000 0x0 0x10000>; + interrupts = <0 60 0x4>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + usb3-lpm-capable; + snps,dis-u1u2-when-u3-quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + configure-gfladj; + }; + + usb1: usb3@3000000 { + compatible = "snps,dwc3"; + reg = <0x0 0x3000000 0x0 0x10000>; + interrupts = <0 61 0x4>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + usb3-lpm-capable; + snps,dis-u1u2-when-u3-quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + configure-gfladj; + }; + + usb2: usb3@3100000 { + compatible = "snps,dwc3"; + reg = <0x0 0x3100000 0x0 0x10000>; + interrupts = <0 63 0x4>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + usb3-lpm-capable; + snps,dis-u1u2-when-u3-quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + configure-gfladj; + }; }; sata: sata@3200000 { |