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authorLaurentiu Tudor <laurentiu.tudor@nxp.com>2018-05-17 11:56:27 +0300
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:10:40 +0800
commitb3dc531ee7612279b2921ec27237cf2c5106b418 (patch)
treef2b19894bf0b45304e2ab6ed5ca3710a929919fb /arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
parentf8bc3940d0cd86b7fbc148379fcf3d3251970f0a (diff)
arm64: dts: ls104x: add iommu-map to pci controllers
The pci controllers are also behind the smmu so add the iommu-map property to reflect this. The bootloader needs to patch the stream id ranges to some sane values. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index eb45e1fb3c12..fc869bd40add 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -807,6 +807,7 @@
#size-cells = <2>;
device_type = "pci";
dma-coherent;
+ iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
@@ -833,6 +834,7 @@
#size-cells = <2>;
device_type = "pci";
dma-coherent;
+ iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
@@ -859,6 +861,7 @@
#size-cells = <2>;
device_type = "pci";
dma-coherent;
+ iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */