diff options
| author | Pankaj Bansal <pankaj.bansal@nxp.com> | 2019-04-22 16:43:13 +0530 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:11:06 +0800 |
| commit | 44f789de2dbeda69a6040616c2c6fa49efd834d0 (patch) | |
| tree | 6189df234f6089cdcab83e73003ef184cae068ba /arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | |
| parent | e8d5168a1166d9871aee99d09bd52cee1de61a6b (diff) | |
arm64: dts: fsl: layerscape: fix warnings when compiling dts files
when compiling dts file using DTC_FLAG='-@', the device tree compiler
reports these warnings:
Warning (alias_paths): /aliases: aliases property name must include
only lowercase and '-'
Fixed the node aliases to silence these warnings.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts index bedd5c6f4d1f..fae4f37485b0 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts @@ -3,7 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1046A family SoC. * * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018-2019 NXP * * Shaohui Xie <Shaohui.Xie@nxp.com> */ @@ -26,19 +26,19 @@ serial2 = &duart2; serial3 = &duart3; - emi1_slot1 = &ls1046mdio_s1; - emi1_slot2 = &ls1046mdio_s2; - emi1_slot4 = &ls1046mdio_s4; - - sgmii_s1_p1 = &sgmii_phy_s1_p1; - sgmii_s1_p2 = &sgmii_phy_s1_p2; - sgmii_s1_p3 = &sgmii_phy_s1_p3; - sgmii_s1_p4 = &sgmii_phy_s1_p4; - sgmii_s4_p1 = &sgmii_phy_s4_p1; - qsgmii_s2_p1 = &qsgmii_phy_s2_p1; - qsgmii_s2_p2 = &qsgmii_phy_s2_p2; - qsgmii_s2_p3 = &qsgmii_phy_s2_p3; - qsgmii_s2_p4 = &qsgmii_phy_s2_p4; + emi1-slot1 = &ls1046mdio_s1; + emi1-slot2 = &ls1046mdio_s2; + emi1-slot4 = &ls1046mdio_s4; + + sgmii-s1-p1 = &sgmii_phy_s1_p1; + sgmii-s1-p2 = &sgmii_phy_s1_p2; + sgmii-s1-p3 = &sgmii_phy_s1_p3; + sgmii-s1-p4 = &sgmii_phy_s1_p4; + sgmii-s4-p1 = &sgmii_phy_s4_p1; + qsgmii-s2-p1 = &qsgmii_phy_s2_p1; + qsgmii-s2-p2 = &qsgmii_phy_s2_p2; + qsgmii-s2-p3 = &qsgmii_phy_s2_p3; + qsgmii-s2-p4 = &qsgmii_phy_s2_p4; }; chosen { |