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authorFlorinel Iordache <florinel.iordache@nxp.com>2019-05-27 15:57:05 +0300
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:11:14 +0800
commitf0f0a99109f205b225870513086d7dbd9d3c9b47 (patch)
tree4ad2d13f93757de4ec14e6de177dc3ffc4a57202 /arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
parent5687a1404940c73190c4b811024f4d45599c0623 (diff)
arm64: dts: fsl: remove backplane support
Remove entire backplane support from device tree for all supported platforms Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts34
1 files changed, 0 insertions, 34 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
index 5016f25628b7..de4d3b5bf4b1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
@@ -100,36 +100,6 @@ pcie@3600000 {
compatible = "fsl,fman", "simple-bus";
};
-&mdio9 {
- pcsphy6: ethernet-phy@0 {
- backplane-mode = "10gbase-kr";
- compatible = "ethernet-phy-ieee802.3-c45";
- reg = <0x0>;
- fsl,lane-handle = <&serdes1>;
- fsl,lane-reg = <0x8C0 0x40>; /* lane D */
- };
-};
-
-&mdio10 {
- pcsphy7: ethernet-phy@0 {
- backplane-mode = "10gbase-kr";
- compatible = "ethernet-phy-ieee802.3-c45";
- reg = <0x0>;
- fsl,lane-handle = <&serdes1>;
- fsl,lane-reg = <0x880 0x40>; /* lane C */
- };
-};
-
-/* Update MAC connections to backplane PHYs
- * &mac9 {
- * phy-handle = <&pcsphy6>;
- *};
- *
- *&mac10 {
- * phy-handle = <&pcsphy7>;
- *};
-*/
-
&clockgen {
dma-coherent;
};
@@ -298,10 +268,6 @@ pcie@3600000 {
dma-coherent;
};
-&serdes1 {
- dma-coherent;
-};
-
&fsldpaa {
dma-coherent;
};