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| author | Tang Yuantian <Yuantian.Tang@nxp.com> | 2016-08-09 09:51:21 +0800 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2016-08-10 00:03:30 -0400 |
| commit | 107a077d19341b4d47ae06f0bd24883b94e64628 (patch) | |
| tree | 58db474530ad98803d93f0c5124f5d70bd2ae308 /arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | |
| parent | 535fd072202dbc8afe5a4093178132bdd4ac2424 (diff) | |
ahci: qoriq: adjust sata parameter
The default values for Port Phy2Cfg register and
Port Phy3Cfg register are better, no need to overwrite them.
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi')
0 files changed, 0 insertions, 0 deletions