diff options
| author | Florinel Iordache <florinel.iordache@nxp.com> | 2019-05-27 15:57:05 +0300 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:11:14 +0800 |
| commit | f0f0a99109f205b225870513086d7dbd9d3c9b47 (patch) | |
| tree | 4ad2d13f93757de4ec14e6de177dc3ffc4a57202 /arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | |
| parent | 5687a1404940c73190c4b811024f4d45599c0623 (diff) | |
arm64: dts: fsl: remove backplane support
Remove entire backplane support from device tree for all supported platforms
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 60 |
1 files changed, 0 insertions, 60 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts index 48424d628eec..a0c27b5bac0d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -316,46 +316,6 @@ status = "okay"; }; -&pcs_mdio1 { - pcs_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c45"; - backplane-mode = "40gbase-kr"; - reg = <0x0>; - fsl,lane-handle = <&serdes1>; - fsl,lane-reg = <0xF00 0xE00 0xD00 0xC00>; /* lanes H, G, F, E */ - }; -}; - -&pcs_mdio2 { - pcs_phy2: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c45"; - backplane-mode = "40gbase-kr"; - reg = <0x0>; - fsl,lane-handle = <&serdes1>; - fsl,lane-reg = <0xB00 0xA00 0x900 0x800>; /* lanes D, C, B, A */ - }; -}; - -&pcs_mdio3 { - pcs_phy3: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c45"; - backplane-mode = "10gbase-kr"; - reg = <0x0>; - fsl,lane-handle = <&serdes1>; - fsl,lane-reg = <0xF00 0x100>; /* lane H */ - }; -}; - -&pcs_mdio4 { - pcs_phy4: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c45"; - backplane-mode = "10gbase-kr"; - reg = <0x0>; - fsl,lane-handle = <&serdes1>; - fsl,lane-reg = <0xE00 0x100>; /* lane G */ - }; -}; - &sata0 { status = "okay"; }; @@ -371,23 +331,3 @@ &sata3 { status = "okay"; }; - -/* Update DPMAC connections to 40G backplane PHYs - * &dpmac1 { - * phy-handle = <&pcs_phy1>; - * }; - * - * &dpmac2 { - * phy-handle = <&pcs_phy2>; - * }; - */ - -/* Update DPMAC connections to 10G backplane PHYs - * &dpmac3 { - * phy-handle = <&pcs_phy3>; - * }; - * - * &dpmac4 { - * phy-handle = <&pcs_phy4>; - * }; - */ |