diff options
| author | Haibo Chen <haibo.chen@nxp.com> | 2019-01-28 18:46:32 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:00 +0800 |
| commit | e2581a17e842b0aa9ffeda7ab366871ba570db7e (patch) | |
| tree | 45a92f70f5eb147e07b2ae2db280e864a19b71aa /arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | |
| parent | 93f723834198e09a4af43d3d4c4f63c9710a6618 (diff) | |
ARM64: dts: imx8qxp/imx8qm: add SD3.0 support
Add SD3.0 support, and make usdhc support eMMC V5.1
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi index c6f2c51bc39d..cabe4ef693d6 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi @@ -17,7 +17,7 @@ conn_subsys: bus@5b000000 { }; usdhc1: mmc@5b010000 { - compatible = "fsl,imx8qm-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc"; interrupt-parent = <&gic>; interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b010000 0x10000>; @@ -28,11 +28,13 @@ conn_subsys: bus@5b000000 { assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>; assigned-clock-rates = <200000000>; power-domains = <&pd IMX_SC_R_SDHC_0>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "disabled"; }; usdhc2: mmc@5b020000 { - compatible = "fsl,imx8qm-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc"; interrupt-parent = <&gic>; interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b020000 0x10000>; @@ -49,7 +51,7 @@ conn_subsys: bus@5b000000 { }; usdhc3: mmc@5b030000 { - compatible = "fsl,imx8qm-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc"; interrupt-parent = <&gic>; interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b030000 0x10000>; @@ -60,6 +62,8 @@ conn_subsys: bus@5b000000 { assigned-clocks = <&clk IMX_CONN_SDHC2_CLK>; assigned-clock-rates = <200000000>; power-domains = <&pd IMX_SC_R_SDHC_2>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "disabled"; }; |