diff options
| author | Mirela Rabulea <mirela.rabulea@nxp.com> | 2019-10-04 18:41:02 +0300 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:08:33 +0800 |
| commit | c6e4ab93f4fe489a4be87ec15570dc4acd185197 (patch) | |
| tree | 3df544264c5447807c2612a2ca48d6a87aa48790 /arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi | |
| parent | 853c80da34b0c4c08c2d894bc6b04e7b1485355d (diff) | |
arm64: dts: Add mxc-jpeg decoder/encoder nodes for imx8qxp/qm
Add jpeg decoder/encoder nodes imx8qxp & imx8qm.
At this stage, labgrid tests pass on imx8qxp/qm.
Also, basic v4l2-compliance tests pass on imx8qxp/qm.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi index 4e0b6ec1f958..f7b2e3a042c9 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi @@ -476,5 +476,55 @@ img_subsys: bus@58000000 { power-domain-names = "pd_pi", "pd_isi_ch0"; status = "disabled"; }; + + jpegdec: jpegdec@58400000 { + compatible = "fsl,imx8-jpgdec"; + reg = <0x58400000 0x00050000 >; + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&img_jpeg_dec_clk 0>, + <&img_jpeg_dec_clk 1>; + clock-names = "per", "ipg"; + assigned-clocks = <&img_jpeg_dec_clk 0>, + <&img_jpeg_dec_clk 1>; + assigned-clock-rates = <200000000>; + power-domains = <&pd IMX_SC_R_ISI_CH0>, + <&pd IMX_SC_R_MJPEG_DEC_MP>, + <&pd IMX_SC_R_MJPEG_DEC_S0>, + <&pd IMX_SC_R_MJPEG_DEC_S1>, + <&pd IMX_SC_R_MJPEG_DEC_S2>, + <&pd IMX_SC_R_MJPEG_DEC_S3>; + power-domain-names = "pd_isi_ch0", "pd_dec_mp", + "pd_dec_s0", "pd_dec_s1", + "pd_dec_s2", "pd_dec_s3"; + status = "disabled"; + }; + + jpegenc: jpegenc@58450000 { + compatible = "fsl,imx8-jpgenc"; + reg = <0x58450000 0x00050000 >; + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&img_jpeg_enc_clk 0>, + <&img_jpeg_enc_clk 1>; + clock-names = "per", "ipg"; + assigned-clocks = <&img_jpeg_enc_clk 0>, + <&img_jpeg_enc_clk 1>; + assigned-clock-rates = <200000000>; + power-domains = <&pd IMX_SC_R_ISI_CH0>, + <&pd IMX_SC_R_MJPEG_ENC_MP>, + <&pd IMX_SC_R_MJPEG_ENC_S0>, + <&pd IMX_SC_R_MJPEG_ENC_S1>, + <&pd IMX_SC_R_MJPEG_ENC_S2>, + <&pd IMX_SC_R_MJPEG_ENC_S3>; + power-domain-names = "pd_isi_ch0", "pd_enc_mp", + "pd_enc_s0", "pd_enc_s1", + "pd_enc_s2", "pd_enc_s3"; + status = "disabled"; + }; }; }; |