MLK-24796-2: dts: imx8qxp: add imx_mic_intr for ep and add cma node for rc

For rc, use cma node to allocate share memory from rc ddr dynamically.
So add a new imx8qxp-mek-vop.dts file for rc.
For ep, add an imx_mic_intr node to config the power and clock of
mu8a/mu8b, which are used to generate interrupts from rc to ep.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
index f406f6adce31..ff196f39949c 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
@@ -163,6 +163,16 @@ lsio_subsys: bus@5d000000 {
 		power-domains = <&pd IMX_SC_R_MU_5A>;
 	};
 
+	lsio_mu8: mic_intr@5d230000 {
+		compatible = "fsl,imx-mic-intr";
+		reg = <0x5d230000 0x10000>;
+		interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+		/* Also enable MU8B pd since MIC host need touch it's registers */
+		power-domains = <&pd IMX_SC_R_MU_8A>, <&pd IMX_SC_R_MU_8B>;
+		power-domain-names = "pd_a", "pd_b";
+		status = "disabled";
+	};
+
 	lsio_mu13: mailbox@5d280000 {
 		compatible = "fsl,imx8-mu-dsp", "fsl,imx6sx-mu";
 		reg = <0x5d280000 0x10000>;