diff options
| author | Clark Wang <xiaoning.wang@nxp.com> | 2020-02-18 13:21:41 +0800 |
|---|---|---|
| committer | Clark Wang <xiaoning.wang@nxp.com> | 2020-02-21 13:26:28 +0800 |
| commit | c866e9512a3a246d47f7982233574c29a61171d4 (patch) | |
| tree | 7a68a8f95472459102070dd8347baaaba26c80a7 /arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | |
| parent | 54b3750d61fd06d3f15a2cf4d853537d7f233f49 (diff) | |
MLK-23362-1 arm64: dts: imx8dxl: add i2c3 and pca9548
Add i2c3 node.
Correct the place of pca9548 to i2c2 and i2c3.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8dxl-evk.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 89 |
1 files changed, 70 insertions, 19 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts index 1eb0aa07e9fd..7d1badcb5a2c 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts @@ -92,87 +92,131 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; }; +}; + +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pca6416_1: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + pca6416_2: gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; - pca9548@70 { + pca9548_1: pca9548@70 { compatible = "nxp,pca9548"; - reg = <0x70>; #address-cells = <1>; #size-cells = <0>; + reg = <0x70>; i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0x0>; - }; i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <0x1>; - }; i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <0x2>; - }; i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <0x3>; - }; i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <0x4>; - }; i2c@5 { #address-cells = <1>; #size-cells = <0>; reg = <0x5>; - - }; i2c@6 { #address-cells = <1>; #size-cells = <0>; reg = <0x6>; - }; }; }; -&i2c2 { +&i2c3 { #address-cells = <1>; #size-cells = <0>; clock-frequency = <100000>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - pca6416_1: gpio@20 { + pca6416_3: gpio@20 { compatible = "ti,tca6416"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; - pca6416_2: gpio@21 { - compatible = "ti,tca6416"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - }; + pca9548_2: pca9548@70 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2>; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x3>; + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4>; + }; + }; }; &lpuart0 { @@ -344,6 +388,13 @@ >; }; + pinctrl_i2c3: i2c3grp { + fsl,pins = < + IMX8DXL_SPI1_CS0_ADMA_I2C3_SDA 0x06000021 + IMX8DXL_SPI1_SDI_ADMA_I2C3_SCL 0x06000021 + >; + }; + pinctrl_lpuart0: lpuart0grp { fsl,pins = < IMX8DXL_UART0_RX_ADMA_UART0_RX 0x0600004c |