diff options
| author | Clark Wang <xiaoning.wang@nxp.com> | 2020-09-22 14:49:09 +0800 |
|---|---|---|
| committer | Clark Wang <xiaoning.wang@nxp.com> | 2020-09-22 16:27:39 +0800 |
| commit | 3ac4d58d5ddbd5c2ebfcced5053d10e3883c2b3b (patch) | |
| tree | 9f83460c603d72ca63046b0edc83aa7ffc5de959 /arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi | |
| parent | 41fae930efd1b0c4e78c7e3419b81dacee39097e (diff) | |
MLK-24827 ARM64: dts: imx8-dma: change spi and i2c irq number to non-combined
Combined interrupt number may cause unexcepted irq event when using DMA
and too many interrupts are generated.
So change all spi and i2c interrupts number to non-combined for
imx8qxp/8qm/8dxl.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi index ae90a2e139e7..77b5e35d91ae 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi @@ -186,7 +186,7 @@ &lpspi3 { compatible = "fsl,imx8dxl-spi", "fsl,imx8qxp-spi", "fsl,imx7ulp-spi"; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; }; &flexcan1 { |