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author | Richard Zhu <hongxing.zhu@nxp.com> | 2020-03-06 11:14:27 +0800 |
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committer | Richard Zhu <hongxing.zhu@nxp.com> | 2020-03-06 15:25:10 +0800 |
commit | 904c984a8d028f5f8649e636de5c4bc6b6198cf8 (patch) | |
tree | e558e25cf4e74fdd969abc1f756dd38ce2c999e5 /arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi | |
parent | ef965379100fd7ca90372c8875fb98caab3aff9e (diff) |
LF-1088 PCI: imx: pcie rc can't access ep's memory
RC can't access EP's DDR memory on i.MX8MQ/i.MX8MM platforms.
Rootcause: The BAR# of EP are not configured correct.
The BAR# offset is 1Mbytes on i.MX8MQ/i.MX8MM, but is 4Kbytes on
other i.MX platforms(e.x 6/7/8QM/8QXP/8MP).
Correct the BAR# access offset on i.MX8MQ/i.MX8MM to fix it.
Let DBI always be writeable in EP/RC validation system.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi')
0 files changed, 0 insertions, 0 deletions