diff options
| author | Fugang Duan <fugang.duan@nxp.com> | 2020-03-06 16:39:45 +0800 |
|---|---|---|
| committer | Fugang Duan <fugang.duan@nxp.com> | 2020-03-06 17:17:48 +0800 |
| commit | e99d9ddb56d519bdffa555fe5da7f711e9c7128f (patch) | |
| tree | 5b2218bf0f1f4db654db6a4730074bb836efaf22 /arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi | |
| parent | 904c984a8d028f5f8649e636de5c4bc6b6198cf8 (diff) | |
MLK-23546: dts: arm64: imx8: assign per clk for 8qm/8qxp
SLSLICE[2] cannot be accessed on 8DXL platform since it is
fixed and locked clock, but can be accessed on 8qm/8qxp platforms
who want to assign the clock to 250Mhz.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi index cd3cf619f7ef..2a53eea53ee9 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi @@ -46,6 +46,8 @@ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_C_CLKDIV>; + assigned-clock-rates = <125000000>; }; &conn_subsys { |