diff options
author | Adrian Alonso <adrian.alonso@nxp.com> | 2020-11-10 16:06:12 -0600 |
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committer | Adrian Alonso <adrian.alonso@nxp.com> | 2020-11-19 13:29:48 -0600 |
commit | f3c605ed45c8690dd1ae71340f058e8f2f717ef1 (patch) | |
tree | 1e98a0f0b51d0f5757cd8ed2646967305f9565e4 /arch/arm64/boot/dts/freescale/imx8mm-evk-hifiberry-dacplus.dts | |
parent | 70d86b05acc0b5e78c0f8db5618786507cabc100 (diff) |
MLK-24931-3: dts: arm64: freescale: imx8mm evk hifiberry dacplus
Enable support for Hifiberry dacplus audio hats on
iMX8MMini EVK.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit ec6d8970ba79fc7cef371eea888d24e5bd347f2a)
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-evk-hifiberry-dacplus.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-evk-hifiberry-dacplus.dts | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk-hifiberry-dacplus.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk-hifiberry-dacplus.dts new file mode 100644 index 000000000000..847ce29dbaf2 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk-hifiberry-dacplus.dts @@ -0,0 +1,102 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2020 NXP. + */ + +#include "imx8mm-evk.dts" + +/ { + ext_osc_22m: ext-osc-22m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <22579200>; + clock-output-names = "sclk0"; + }; + + ext_osc_24m: ext-osc-24m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "sclk1"; + }; + + reg_3v3_vext: regulator-3v3-vext { + compatible = "regulator-fixed"; + regulator-name = "3V3_VEXT"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + sound-ak4458 { + status = "disabled"; + }; + + sound-micfil { + status = "disabled"; + }; + + sound-pcm512x { + compatible = "fsl,imx-audio-pcm512x"; + model = "pcm512x-audio"; + audio-cpu = <&sai5>; + audio-codec = <&pcm512x>; + format = "i2s"; + audio-widgets = + "Line", "Left Line Out Jack", + "Line", "Right Line Out Jack"; + audio-routing = + "Left Line Out Jack", "OUTL", + "Right Line Out Jack", "OUTR"; + bitclock-master = <&pcm512x>; + frame-master = <&pcm512x>; + dac,24db_digital_gain; + dac,led_status; + }; +}; + +&i2c3 { + ak4458_1: ak4458@10 { + status = "disabled"; + }; + + ak4458_2: ak4458@12 { + status = "disabled"; + }; + + ak5558: ak5558@13 { + status = "disabled"; + }; + + ak4497: ak4497@11 { + status = "disabled"; + }; + + pcm512x: pcm512x@4d { + compatible = "ti,pcm5122"; + reg = <0x4d>; + AVDD-supply = <®_3v3_vext>; + DVDD-supply = <®_3v3_vext>; + CPVDD-supply = <®_3v3_vext>; + clocks = <&ext_osc_22m>, <&ext_osc_24m>; + clock-names = "sclk0", "sclk1"; + }; +}; + +&iomuxc { + pinctrl_sai5: sai5grp { + fsl,pins = < + MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6 + MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6 + MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6 + MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6 + >; + }; +}; + +&micfil { + status = "disabled"; +}; + +&sai5 { + status = "okay"; +}; |