diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2019-11-15 15:30:35 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:02 +0800 |
| commit | 65ff6756ba24c3a9a16b5e8f04fea1b252fcc998 (patch) | |
| tree | b8ec9f9c17680c68696b876979f5b726e62f70a9 /arch/arm64/boot/dts/freescale/imx8mm.dtsi | |
| parent | e44fce2e5fc071dab155707c952713612a894c3b (diff) | |
arm64: dts: imx8mm: add fsl,dataline for SAI node
Add fsl,dataline for SAI node
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 0073221e70ce..e87c238526ec 100755 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -424,6 +424,7 @@ clock-names = "bus", "mclk1", "mclk2", "mclk3"; dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>; dma-names = "rx", "tx"; + fsl,dataline = <0 0xff 0xff>; status = "disabled"; }; @@ -464,6 +465,7 @@ clock-names = "bus", "mclk1", "mclk2", "mclk3"; dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>; dma-names = "rx", "tx"; + fsl,dataline = <0 0xf 0xf>; status = "disabled"; }; |