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authorPeng Fan <peng.fan@nxp.com>2019-10-18 16:28:11 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:08:38 +0800
commit0d974bbbf3848fc669c8aeab4c3a86d15648631d (patch)
tree2c6d72b009baa0b03521f3b8902fe8f724b1c014 /arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts
parent9bf2a3710859d51a4f3daaa4175c41f78bb9f624 (diff)
arm64: dts: imx8mn: add inmate/root dts
Add inmate/root dts for jailhouse dual linux case. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts179
1 files changed, 179 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts
new file mode 100644
index 000000000000..0bacc1835f25
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8mn.dtsi"
+
+/ {
+ model = "Freescale i.MX8MN EVK";
+ compatible = "fsl,imx8mn-evk", "fsl,imx8mm";
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Virtual */
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */
+ clock-frequency = <8333333>;
+ };
+
+ clk_dummy: clock@7 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "clk_dummy";
+ };
+
+ /* The clocks are configured by 1st OS */
+ clk_200m: clock@8 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ clock-output-names = "200m";
+ };
+ clk_266m: clock@9 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <266000000>;
+ clock-output-names = "266m";
+ };
+ clk_80m: clock@10 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <80000000>;
+ clock-output-names = "80m";
+ };
+
+ pci@bb800000 {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &gic GIC_SPI 76 IRQ_TYPE_EDGE_RISING>;
+ reg = <0x0 0xbb800000 0x0 0x100000>;
+ ranges = <0x02000000 0x00 0x10000000 0x0 0x10000000 0x00 0x10000>;
+ };
+};
+
+/delete-node/ &{/memory@40000000};
+/*/delete-node/ &{/reserved-memory};*/
+/*/delete-node/ &{/busfreq};*/
+/*/delete-node/ &ddr_pmu0;*/
+
+&hsiomix_pd {
+ status = "disabled";
+};
+
+&usb_otg1_pd {
+ status = "disabled";
+};
+
+&gpumix_pd {
+ status = "disabled";
+};
+
+&dispmix_pd {
+ status = "disabled";
+};
+
+&mipi_pd {
+ status = "disabled";
+};
+
+&gpio1 {
+ status = "disabled";
+};
+&gpio2 {
+ status = "disabled";
+};
+&gpio3 {
+ status = "disabled";
+};
+&gpio4 {
+ status = "disabled";
+};
+&gpio5 {
+ status = "disabled";
+};
+
+/*/delete-node/ &tmu;*/
+/*/delete-node/ &{/thermal-zones};*/
+&iomuxc {
+ status = "disabled";
+};
+
+&gpr {
+ /delete-property/ compatible;
+};
+
+/delete-node/ &anatop;
+/delete-node/ &snvs;
+
+&clk {
+ /delete-property/ compatible;
+};
+
+&src {
+ /delete-property/ compatible;
+};
+
+/*/delete-node/ &rpmsg;*/
+&ocotp {
+ /delete-property/ compatible;
+ status = "disabled";
+};
+
+/*
+&dispmix_gpr {
+ /delete-property/ compatible;
+};
+*/
+
+&sdma1 {
+ status = "disabled";
+};
+
+&sdma2 {
+ status = "disabled";
+};
+
+&sdma3 {
+ status = "disabled";
+};
+
+/*/delete-node/ &{/imx_ion};*/
+/delete-node/ &crypto;
+/*/delete-node/ &caam_sm;
+/delete-node/ &caam_snvs;
+/delete-node/ &irq_sec_vio;*/
+
+/delete-node/ &{/cpus/cpu@0};
+/delete-node/ &{/cpus/cpu@1};
+/*/delete-node/ &{/pmu};*/
+
+&uart4 {
+ clocks = <&osc_24m>,
+ <&osc_24m>;
+ clock-names = "ipg", "per";
+ /delete-property/ dmas;
+ /delete-property/ dmas-names;
+ status = "okay";
+};
+
+&usdhc3 {
+ clocks = <&clk_dummy>,
+ <&clk_266m>,
+ <&clk_200m>;
+ /delete-property/assigned-clocks;
+ /delete-property/assigned-clock-rates;
+ clock-names = "ipg", "ahb", "per";
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};