diff options
| author | Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-09-01 17:58:08 +0800 |
|---|---|---|
| committer | Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-09-02 01:56:27 +0800 |
| commit | 1e43e235fb134e5a991854f0e1b724400028ea21 (patch) | |
| tree | d6c681efb963908afea4996bf9887c850b951281 /arch/arm64/boot/dts/freescale/imx8mn.dtsi | |
| parent | 6d1676342d65cd7950375994783928dca9ffa57e (diff) | |
MLK-24613 arch: arm64: imx8mn: add ddr pmu device node
Add ddr pmu device node for i.MX8MN EVK.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mn.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index 082a0ff46dd0..acae65926946 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -1166,6 +1166,12 @@ interrupt-controller; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; + + ddr-pmu@3d800000 { + compatible = "fsl,imx8mn-ddr-pmu", "fsl,imx8m-ddr-pmu"; + reg = <0x3d800000 0x400000>; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + }; }; gpu: gpu@38000000 { |