diff options
author | Jacky Bai <ping.bai@nxp.com> | 2019-11-29 10:08:48 +0800 |
---|---|---|
committer | Jacky Bai <ping.bai@nxp.com> | 2019-11-29 10:34:31 +0800 |
commit | 5aa37b5e7d482805c9f0ada3bf7191b5e9887e39 (patch) | |
tree | ae45163f8c8d0ca810813aabef8de292cad345ac /arch/arm64/boot/dts/freescale/imx8mn.dtsi | |
parent | bb46a80aef6837ecdba10bc1e7d7c043eb464c58 (diff) |
LF-223-02 arm64: dts: freescale: Add cpuidle state node for im8mn
Add the cpuidle state node for imx8mn.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mn.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index b5c0011a5604..5bdb6d429331 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -47,6 +47,20 @@ #address-cells = <1>; #size-cells = <0>; + idle-states { + entry-method = "psci"; + + CPU_SLEEP: cpu-sleep { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010033>; + local-timer-stop; + entry-latency-us = <1000>; + exit-latency-us = <700>; + min-residency-us = <2700>; + wakeup-latency-us = <1500>; + }; + }; + A53_0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; @@ -58,6 +72,7 @@ operating-points-v2 = <&a53_opp_table>; nvmem-cells = <&cpu_speed_grade>; nvmem-cell-names = "speed_grade"; + cpu-idle-states = <&CPU_SLEEP>; #cooling-cells = <2>; }; @@ -70,6 +85,7 @@ enable-method = "psci"; next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; + cpu-idle-states = <&CPU_SLEEP>; #cooling-cells = <2>; }; @@ -82,6 +98,7 @@ enable-method = "psci"; next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; + cpu-idle-states = <&CPU_SLEEP>; #cooling-cells = <2>; }; @@ -94,6 +111,7 @@ enable-method = "psci"; next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; + cpu-idle-states = <&CPU_SLEEP>; #cooling-cells = <2>; }; |