diff options
| author | Robin Gong <yibin.gong@nxp.com> | 2019-11-15 18:37:50 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:01 +0800 |
| commit | ac098c2384aa67bbc18c4fa6ac2fed50f98ac4c5 (patch) | |
| tree | af87156dda1b3b96ffae150ec2905e5a695404ec /arch/arm64/boot/dts/freescale/imx8mn.dtsi | |
| parent | 5e11a3cf275b2497b5a3ff96aad9ecb4e10e089c (diff) | |
ARM64: dts: freescale: imx8mn: correct clock setting for sdma1
sdma1 should work in clock ratio 1:2, thus ahb clock should be correct
to IMX8MN_CLK_AHB, otherwise, 1:1 clock ratio will be used wrong like
sdma2/3. Correct it to IPG@66Mhz/AHB@133Mhz.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mn.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index 3db4c151bbfb..33c984101b18 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -869,7 +869,7 @@ reg = <0x30bd0000 0x10000>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_SDMA1_ROOT>, - <&clk IMX8MN_CLK_SDMA1_ROOT>; + <&clk IMX8MN_CLK_AHB>; clock-names = "ipg", "ahb"; #dma-cells = <3>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; |