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authorRichard Zhu <hongxing.zhu@nxp.com>2021-03-23 08:54:43 +0800
committerAndrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>2021-04-27 10:42:05 +0000
commit122206c61ff9b70374db0f92a22bc481348981e2 (patch)
tree30c64e7366abafafb5e2b366a3df2fa35dec475a /arch/arm64/boot/dts/freescale/imx8mp-evk.dts
parent4e0f7250876e096f938cb4dc7b1943d86037dc05 (diff)
MLK-25349-3 PCI: imx: clear vreg bypass when pcie vph voltage is 3v3
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY. In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, the VREG_BYPASS bits of GPR registers should be cleared from default value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be turned on. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Jun Li <jun.li@nxp.com> (cherry picked from commit 94e84f467b688ce79eb3239f1516f6009b75a19b) (cherry picked from commit 9ffc9044e99182f743ff272af71d8888f2d8665c) Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-evk.dts')
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