diff options
| author | Robby Cai <robby.cai@nxp.com> | 2020-03-02 11:30:35 +0800 |
|---|---|---|
| committer | Robby Cai <robby.cai@nxp.com> | 2020-04-30 16:34:05 +0800 |
| commit | 2b941dee90bd39d9b367529cefdd657ee1d40ac4 (patch) | |
| tree | d54dab51406266540f0274e8c50cad4fcd27e2cf /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | 9bbea7a5e3c69b6a64cccbfe7cc4cec2fcb554c9 (diff) | |
MLK-23600-1 arm64: dts: imx8mp: add isp nodes
add isp nodes for imx8mp(m865)
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 176d120ee55b..e0f9dbf88f58 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1789,6 +1789,32 @@ }; }; + isp_0: isp@32e10000 { + compatible = "fsl,imx8mp-isp"; + reg = <0x32e10000 0x10000>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; + clock-names = "isp_root"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; + assigned-clock-rates = <500000000>; + power-domains = <&ispdwp_pd>; + status = "disabled"; + }; + + isp_1: isp@32e20000 { + compatible = "fsl,imx8mp-isp"; + reg = <0x32e20000 0x10000>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; + clock-names = "isp_root"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; + assigned-clock-rates = <500000000>; + power-domains = <&ispdwp_pd>; + status = "disabled"; + }; + mipi_csi_0: csi@32e40000 { compatible = "fsl,imx8mp-mipi-csi", "fsl,imx8mn-mipi-csi"; reg = <0x32e40000 0x10000>; |