diff options
author | Liu Ying <victor.liu@nxp.com> | 2020-01-20 09:57:42 +0800 |
---|---|---|
committer | Liu Ying <victor.liu@nxp.com> | 2020-02-13 12:13:11 +0800 |
commit | 363ca859fd1ae90a7555cc54f95f57e0380fc2ca (patch) | |
tree | 46de79b24f930f5ebd8819c002ce7589e5216082 /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
parent | ff37a4d5fd750e51cfe4076c7045daca1f9c4c94 (diff) |
MLK-23252-11 arm64: imx8mq.dtsi: Add LDB node support
This patch adds LDB devictree node support.
LVDS PHY node is also added as needed by the LDB node.
Also, connect lcdif2_disp port with lvds-channel@0/1 ports.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 0072ca19d6ce..9e425f8f6aa4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1436,7 +1436,19 @@ status = "disabled"; lcdif2_disp: port@0 { + #address-cells = <1>; + #size-cells = <0>; reg = <0>; + + lcdif2_disp_ldb_ch0: endpoint@0 { + reg = <0>; + remote-endpoint = <&ldb_ch0>; + }; + + lcdif2_disp_ldb_ch1: endpoint@1 { + reg = <1>; + remote-endpoint = <&ldb_ch1>; + }; }; }; @@ -1446,6 +1458,52 @@ reg = <0x32ec0000 0x10000>; }; + ldb: ldb@32ec005c { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx8mp-ldb"; + clocks = <&clk IMX8MP_CLK_MEDIA_LDB_ROOT>; + clock-names = "ldb"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>; + assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>; + gpr = <&mediamix_blk_ctl>; + status = "disabled"; + + lvds-channel@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + phys = <&ldb_phy1>; + phy-names = "ldb_phy"; + status = "disabled"; + + port@0 { + reg = <0>; + + ldb_ch0: endpoint { + remote-endpoint = <&lcdif2_disp_ldb_ch0>; + }; + }; + }; + + lvds-channel@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + phys = <&ldb_phy2>; + phy-names = "ldb_phy"; + status = "disabled"; + + port@0 { + reg = <0>; + + ldb_ch1: endpoint { + remote-endpoint = <&lcdif2_disp_ldb_ch1>; + }; + }; + }; + }; + /* TODO for HDMI PHY power on */ hdmi_blk: hdmi-blk@32fc0000 { compatible = "syscon"; @@ -1606,6 +1664,24 @@ reg = <0x32ec0090 0x28>; }; + ldb_phy: phy@32ec0128 { + compatible = "fsl,imx8mp-lvds-phy"; + #address-cells = <1>; + #size-cells = <0>; + gpr = <&mediamix_blk_ctl>; + status = "disabled"; + + ldb_phy1: port@0 { + reg = <0>; + #phy-cells = <0>; + }; + + ldb_phy2: port@1 { + reg = <1>; + #phy-cells = <0>; + }; + }; + cameradev: camera { compatible = "fsl,mxc-md", "simple-bus"; #address-cells = <1>; |