diff options
| author | Guoniu.zhou <guoniu.zhou@nxp.com> | 2020-11-20 19:04:46 +0800 |
|---|---|---|
| committer | Guoniu.zhou <guoniu.zhou@nxp.com> | 2020-11-21 16:21:00 +0800 |
| commit | 4c9ea7ca0a22b18e358856a460fa48f0e744b956 (patch) | |
| tree | b740c9497aed4645bde12ab182b1f271ebaa0e44 /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | a07f9868b5b6c0f581516324dc8df2e232852f0b (diff) | |
MLK-25027-1: arm64: imx8mp.dtsi: add device node for isi chain buffer
When ISI output width more than 2048, it need to use adjacent channel
chain buffer to receive more data. For iMX865, clock for each channel
is independent, so need to enable the adjacent channel clock when the
channel0 chain buffer enabled. This is a workaround for IC issue.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 9512cbe5df0d..e3ec280b53d0 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1742,6 +1742,11 @@ reg = <0x32ec0008 0x4>; }; + isi_chain_buf: isi_chain@32e02000{ + compatible = "fsl,imx8mp-iomuxc-gpr", "syscon"; + reg = <0x32e02000 0x4>; + }; + cameradev: camera { compatible = "fsl,mxc-md", "simple-bus"; #address-cells = <1>; @@ -1764,6 +1769,7 @@ assigned-clock-rates = <500000000>, <200000000>; no-reset-control; power-domains = <&mediamix_pd>; + isi_chain = <&isi_chain_buf>; status = "disabled"; cap_device { |