diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2021-03-22 15:19:20 +0100 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2021-04-21 14:49:21 +0200 |
| commit | 82e97870feb6303ecc71371abc76a606e724b065 (patch) | |
| tree | 8ea64ef5c8671b0cbe349d782a2d9eba9faff073 /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | 8c05b31a44c32557db8bd9c151b2d057b2e7c5af (diff) | |
fsl_sai: work around missing MCLK on i.mx 8m plus
Some audio codecs need the MCLK during setup of the codec, however
for the i.MX 8M Plus it is gated with the bce bit.
So enable the bit already in fsl_sai_hw_params() which is an
early state when initalizing sai and codec.
Notably the WM8904 codec on the Dahlia carrier board is affected.
Fixes a timeout on audio start:
root@verdin-imx8mp:~# aplay sound/Gong.wav
[ 1356.402716] wm8904 3-001a: DC servo timed out
[ 1362.410401] wm8904 3-001a: DC servo timed out
Playing WAVE 'sound/Gong.wav' : Signed 16 bit Little Endian, Rate 44100 Hz, Stereo
Related-to: ELB-3554
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index a0867c9feeb8..3a16d9d80a56 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1167,7 +1167,7 @@ ranges; sai1: sai@30c10000 { - compatible = "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + compatible = "fsl,imx8mp-sai", "fsl,imx6sx-sai"; reg = <0x30c10000 0x10000>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI1_IPG>, <&clk IMX8MP_CLK_DUMMY>, @@ -1183,7 +1183,7 @@ }; sai2: sai@30c20000 { - compatible = "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + compatible = "fsl,imx8mp-sai", "fsl,imx6sx-sai"; reg = <0x30c20000 0x10000>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI2_IPG>, <&clk IMX8MP_CLK_DUMMY>, @@ -1199,7 +1199,7 @@ }; sai3: sai@30c30000 { - compatible = "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + compatible = "fsl,imx8mp-sai", "fsl,imx6sx-sai"; reg = <0x30c30000 0x10000>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI3_IPG>, <&clk IMX8MP_CLK_DUMMY>, @@ -1215,7 +1215,7 @@ }; sai5: sai@30c50000 { - compatible = "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + compatible = "fsl,imx8mp-sai", "fsl,imx6sx-sai"; reg = <0x30c50000 0x10000>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI5_IPG>, <&clk IMX8MP_CLK_DUMMY>, @@ -1231,7 +1231,7 @@ }; sai6: sai@30c60000 { - compatible = "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + compatible = "fsl,imx8mp-sai", "fsl,imx6sx-sai"; reg = <0x30c60000 0x10000>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI6_IPG>, @@ -1248,7 +1248,7 @@ }; sai7: sai@30c80000 { - compatible = "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + compatible = "fsl,imx8mp-sai", "fsl,imx6sx-sai"; reg = <0x30c80000 0x10000>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI7_IPG>, <&clk IMX8MP_CLK_DUMMY>, |