diff options
| author | Silvano di Ninno <silvano.dininno@nxp.com> | 2020-02-21 16:12:34 +0100 |
|---|---|---|
| committer | Silvano di Ninno <silvano.dininno@nxp.com> | 2020-02-24 13:08:39 +0100 |
| commit | ad460e81a448fa3474b4b526938235f95e1458b7 (patch) | |
| tree | ed2d8428c3efd2d2a099bd604430c35e1c1ef677 /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | 072173c9844b9ff82693dafc383e7a38971ac4f4 (diff) | |
TEE-502 arch: arm64: dts: imx8dxl:imx8dx:imx8mp reserved BL32 memory
BL32 base address is set within the first 1GByte of DDR.
As a new rule it will be set at base address + 0x16000000.
This new position will relax current dependency of the OPTEE
base address on the size of the DDR.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index f437eee5ba9d..31a5b74d5619 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -178,7 +178,15 @@ #address-cells = <2>; #size-cells = <2>; ranges; - + +/* + * Memory reserved for optee usage. Please do not use. + * This will be automaticky added to dtb if OP-TEE is installed. + * optee@56000000 { + * reg = <0 0x56000000 0 0x2000000>; + * no-map; + * }; + */ /* global autoconfigured region for contiguous allocations */ linux,cma { compatible = "shared-dma-pool"; |