diff options
| author | Peng Fan <peng.fan@nxp.com> | 2020-02-24 15:32:11 +0800 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2020-02-26 15:13:04 +0800 |
| commit | b027bfd91819a6861ce67ee02f4139ce9744fc22 (patch) | |
| tree | b8d73442e70bf29339b07d969c868eda892eb07f /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | 80ef9839d811d9437a3be613d449e9ffe63fc922 (diff) | |
MLK-23373-1 ARM64: dts: imx8mp: correct interrupt parent
With GPC as interrupt parent, need set edac and irqsteer interrupt
parent as gpc.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 31a5b74d5619..cc76e5b0c274 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -155,7 +155,6 @@ edacmc: memory-controller@3d400000 { compatible = "fsl,imx8mp-ddrc"; reg = <0x0 0x3d400000 0x0 0x400000>; - interrupt-parent = <&gic>; interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; }; @@ -1560,7 +1559,7 @@ reg = <0x32fc2000 0x1000>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; - interrupt-parent = <&gpc>; + interrupt-parent = <&gic>; #interrupt-cells = <1>; fsl,channel = <1>; fsl,num-irqs = <64>; |