diff options
| author | Liu Ying <victor.liu@nxp.com> | 2020-01-19 17:54:22 +0800 |
|---|---|---|
| committer | Liu Ying <victor.liu@nxp.com> | 2020-02-13 12:12:59 +0800 |
| commit | ff37a4d5fd750e51cfe4076c7045daca1f9c4c94 (patch) | |
| tree | b5d2b7c616ee4f11ebef79ac282a7c0bf7aa35a6 /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | 8391ae3109e033f2c6a02bf7ac223e720b14abca (diff) | |
MLK-23252-10 arm64: imx8mp.dtsi: Add LCDIF2 node
This patch adds LCDIF2 node support.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 907376d6479b..0072ca19d6ce 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1416,6 +1416,30 @@ }; }; + lcdif2: lcd-controller@32e90000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx8mp-lcdif2"; + reg = <0x32e90000 0x10000>; + clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + clock-names = "pix", "disp-axi", "disp-apb"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>, + <&clk IMX8MP_SYS_PLL2_1000M>, + <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <1039500000>, <500000000>, <200000000>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + lcdif2_disp: port@0 { + reg = <0>; + }; + }; + mediamix_blk_ctl: blk-ctl@32ec0000 { compatible = "fsl,imx8mp-mediamix-blk-ctl", "syscon"; |