diff options
| author | Ye Li <ye.li@nxp.com> | 2019-12-04 22:12:18 -0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2019-12-05 00:40:19 -0800 |
| commit | aa1e5c0aed0609ea7d23c6a43e988b79cb70f1f2 (patch) | |
| tree | d757d434ca661e89291d828b0b3716ba7d441636 /arch/arm64/boot/dts/freescale/imx8mq-ddr4-val-gpmi-nand.dts | |
| parent | 2d7e271500fb2f2c88e7e22cbf0971d4bb42fe19 (diff) | |
LF-362-2 arm64: dts: imx8mq: Add DDR3l and DDR4 validation boards support
Add DTS files to support iMX8MQ DDR3l and DDR4 validation boards. Basic nodes
like UART, SD/eMMC, i2c, Ethernet, rawnand and usb are added to work.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-ddr4-val-gpmi-nand.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq-ddr4-val-gpmi-nand.dts | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-ddr4-val-gpmi-nand.dts b/arch/arm64/boot/dts/freescale/imx8mq-ddr4-val-gpmi-nand.dts new file mode 100644 index 000000000000..826ba6eb67b5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mq-ddr4-val-gpmi-nand.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2017-2019 NXP + */ + +#include "imx8mq-ddr4-val.dts" + +&iomuxc { + + pinctrl_gpmi_nand_1: gpmi-nand-1 { + fsl,pins = < + MX8MQ_IOMUXC_NAND_ALE_RAWNAND_ALE 0x00000096 + MX8MQ_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x00000096 + MX8MQ_IOMUXC_NAND_CLE_RAWNAND_CLE 0x00000096 + MX8MQ_IOMUXC_NAND_DATA00_RAWNAND_DATA00 0x00000096 + MX8MQ_IOMUXC_NAND_DATA01_RAWNAND_DATA01 0x00000096 + MX8MQ_IOMUXC_NAND_DATA02_RAWNAND_DATA02 0x00000096 + MX8MQ_IOMUXC_NAND_DATA03_RAWNAND_DATA03 0x00000096 + MX8MQ_IOMUXC_NAND_DATA04_RAWNAND_DATA04 0x00000096 + MX8MQ_IOMUXC_NAND_DATA05_RAWNAND_DATA05 0x00000096 + MX8MQ_IOMUXC_NAND_DATA06_RAWNAND_DATA06 0x00000096 + MX8MQ_IOMUXC_NAND_DATA07_RAWNAND_DATA07 0x00000096 + MX8MQ_IOMUXC_NAND_RE_B_RAWNAND_RE_B 0x00000096 + MX8MQ_IOMUXC_NAND_READY_B_RAWNAND_READY_B 0x00000056 + MX8MQ_IOMUXC_NAND_WE_B_RAWNAND_WE_B 0x00000096 + MX8MQ_IOMUXC_NAND_WP_B_RAWNAND_WP_B 0x00000096 + >; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand_1>; + status = "okay"; + nand-on-flash-bbt; +}; |