MLK-25915-1 arm64: dts: imx8m: set the parent clock of pcie aux clock

Set the parent clock for PCIE_AUX clock firstly, then set the rate of
the PCI_AUX clock to 10MHZ.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit c787efe575330e538cc92da0dde49255bdc80c94)
(cherry picked from commit 855ad0c9b3e9ea03f34c70332a2175cd604acf6c)
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>

1 files changed, 9 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 29bbcffdbb15..cd84f5679eee 100755
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -662,6 +662,9 @@
 		 <&clk IMX8MQ_CLK_PCIE1_PHY>,
 		 <&pcie0_refclk>;
 	clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+	assigned-clocks = <&clk IMX8MQ_CLK_PCIE1_AUX>;
+	assigned-clock-rates = <10000000>;
+	assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_50M>;
 	hard-wired = <1>;
 	status = "okay";
 };
@@ -676,6 +679,9 @@
 		 <&clk IMX8MQ_CLK_PCIE2_PHY>,
 		 <&pcie1_refclk>;
 	clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+	assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_AUX>;
+	assigned-clock-rates = <10000000>;
+	assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_50M>;
 	status = "okay";
 };
 
@@ -687,6 +693,9 @@
 		 <&clk IMX8MQ_CLK_PCIE2_PHY>,
 		 <&pcie1_refclk>;
 	clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+	assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_AUX>;
+	assigned-clock-rates = <10000000>;
+	assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_50M>;
 	status = "disabled";
 };