diff options
| author | Guoniu.zhou <guoniu.zhou@nxp.com> | 2019-03-25 16:22:44 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:09 +0800 |
| commit | 51e520c19f173abc93b0ff1d7256ae7d096eb2b5 (patch) | |
| tree | 5b300abb8871d7d4b351894808e1c417ba9c1bd7 /arch/arm64/boot/dts/freescale/imx8qm-mek.dts | |
| parent | a136034d5f860792644131f5b9000febecae21d5 (diff) | |
arm64: dts: imx8qm-mek: add ov5640 sensor support
Add ov5640 sensor support for imx8qm platform
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qm-mek.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 150 |
1 files changed, 150 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index 32ad12a5bc2f..07bccb8ca0d8 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -115,6 +115,126 @@ status = "okay"; }; +&isi_0 { + status = "okay"; +}; + +&isi_4 { + status = "okay"; +}; + +&csi0_lpcg { + status = "okay"; +}; + +&csi1_lpcg { + status = "okay"; +}; + +&irqsteer_csi0 { + status = "okay"; +}; + +&irqsteer_csi1 { + status = "okay"; +}; + +&mipi_csi_0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + /* Camera 0 MIPI CSI-2 (CSIS0) */ + port@0 { + reg = <0>; + mipi_csi0_ep: endpoint { + remote-endpoint = <&ov5640_mipi_0_ep>; + data-lanes = <1 2>; + bus-type = <4>; + }; + }; +}; + +&mipi_csi_1 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + /* Camera 0 MIPI CSI-2 (CSIS0) */ + port@1 { + reg = <1>; + mipi_csi1_ep: endpoint { + remote-endpoint = <&ov5640_mipi_1_ep>; + data-lanes = <1 2>; + bus-type = <4>; + }; + }; +}; + +&i2c_mipi_csi0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_mipi_csi0>; + clock-frequency = <100000>; + status = "okay"; + + ov5640_mipi_0: ov5640_mipi@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mipi_csi0>; + clocks = <&clk IMX_24MHZ>; + clock-names = "xclk"; + csi_id = <0>; + powerdown-gpios = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>; + reset-gpios = <&lsio_gpio1 27 GPIO_ACTIVE_LOW>; + mclk = <24000000>; + mclk_source = <0>; + mipi_csi; + status = "okay"; + port { + ov5640_mipi_0_ep: endpoint { + remote-endpoint = <&mipi_csi0_ep>; + data-lanes = <1 2>; + clocks-lanes = <0>; + }; + }; + }; +}; + +&i2c_mipi_csi1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_mipi_csi1>; + clock-frequency = <100000>; + status = "okay"; + + ov5640_mipi_1: ov5640_mipi@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mipi_csi1>; + clocks = <&clk IMX_24MHZ>; + clock-names = "xclk"; + csi_id = <0>; + powerdown-gpios = <&lsio_gpio1 31 GPIO_ACTIVE_HIGH>; + reset-gpios = <&lsio_gpio1 30 GPIO_ACTIVE_LOW>; + mclk = <24000000>; + mclk_source = <0>; + mipi_csi; + status = "okay"; + port { + ov5640_mipi_1_ep: endpoint { + remote-endpoint = <&mipi_csi1_ep>; + data-lanes = <1 2>; + clocks-lanes = <0>; + }; + }; + }; +}; + &iomuxc { pinctrl_fec1: fec1grp { fsl,pins = < @@ -191,4 +311,34 @@ IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 >; }; + + pinctrl_i2c_mipi_csi0: i2c_mipi_csi0 { + fsl,pins = < + IMX8QM_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL 0xc2000020 + IMX8QM_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA 0xc2000020 + >; + }; + + pinctrl_i2c_mipi_csi1: i2c_mipi_csi1 { + fsl,pins = < + IMX8QM_MIPI_CSI1_I2C0_SCL_MIPI_CSI1_I2C0_SCL 0xc2000020 + IMX8QM_MIPI_CSI1_I2C0_SDA_MIPI_CSI1_I2C0_SDA 0xc2000020 + >; + }; + + pinctrl_mipi_csi0: mipi_csi0 { + fsl,pins = < + IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 0xC0000041 + IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0xC0000041 + IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041 + >; + }; + + pinctrl_mipi_csi1: mipi_csi1 { + fsl,pins = < + IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0xC0000041 + IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 0xC0000041 + IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT 0xC0000041 + >; + }; }; |