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author | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-30 14:59:23 +0800 |
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committer | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-30 14:59:23 +0800 |
commit | 8529f2a0a81210a877e410151e6322005b874f05 (patch) | |
tree | 97f7f9735d30812fa196b0c5fe2adb1ab33ca804 /arch/arm64/boot/dts/freescale/imx8qm-ss-dc.dtsi | |
parent | c6e5e719e2331ba93231b2ffd793aadc6f2f53db (diff) | |
parent | 6ecade8a69ddbfe024651896fbb77db067ee3f48 (diff) |
Merge remote-tracking branch 'origin/dts/imx8' into dts/next
* origin/dts/imx8: (498 commits)
LF-3444 arm64: dts: imx8x-mek.dtsi: Drop the m4_reserved node
LF-4748-2 arm64: dts: imx8qm-mek-cockpit-a72: fix wm8960 audio
arm64: dts: imx8qm-mek-cockpit-a72: fix edma names
arm64: dts: imx8qm-mek-cockpit: fix edma configuration
arm64: dts: imx8qm-mek-cockpit: apply changes for upstream Cadence USB3 driver
...
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qm-ss-dc.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qm-ss-dc.dtsi | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dc.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dc.dtsi new file mode 100644 index 000000000000..e0c93f2aeddc --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dc.dtsi @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright 2019 NXP + */ + +&dpu1 { + compatible = "fsl,imx8qm-dpu"; + + dpu1_disp0: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + dpu1_disp0_hdmi: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_disp>; + }; + + dpu1_disp0_mipi0: endpoint@1 { + reg = <1>; + remote-endpoint = <&mipi0_dsi_in>; + }; + }; + + dpu1_disp1: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + dpu1_disp1_ldb1_ch0: endpoint@0 { + remote-endpoint = <&ldb1_ch0>; + }; + + dpu1_disp1_ldb1_ch1: endpoint@1 { + remote-endpoint = <&ldb1_ch1>; + }; + }; +}; + +&dpu2 { + compatible = "fsl,imx8qm-dpu"; + + dpu2_disp0: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + dpu2_disp0_mipi1: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi1_dsi_in>; + }; + + }; + + dpu2_disp1: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + dpu2_disp1_ldb2_ch0: endpoint@0 { + remote-endpoint = <&ldb2_ch0>; + }; + + dpu2_disp1_ldb2_ch1: endpoint@1 { + remote-endpoint = <&ldb2_ch1>; + }; + }; +}; + +/ { + display-subsystem { + compatible = "fsl,imx-display-subsystem"; + ports = <&dpu1_disp0>, <&dpu1_disp1>, + <&dpu2_disp0>, <&dpu2_disp1>; + }; +}; |